ExecuTorch: compare embedded deployment routes

Cortex-M CPU: operations and checks

The Cortex-M route runs model operations on the processor using CMSIS-NN, a library of optimized functions. It remains beta. Supported operations use eight-bit integer representations; unsupported operations fall back to portable floating-point implementations. Prepare the model by exporting, calibrating quantization—the reduced-precision number representation—re-exporting and transforming it. For validation, bundled programs carry reference inputs and outputs. The runner reports PASS or FAIL through its serial interface. That checks numerical agreement with the quantized model, not classification accuracy on real tasks.

Ethos-U: dedicated accelerator and memory

The Ethos-U route requires an Ethos-U neural-network accelerator in the target system. Operations assigned to it must be quantized. TOSA provides an intermediate graph format; the Vela compiler turns that representation into accelerator commands. Memory also constrains selection: Shared-SRAM keeps intermediate results on-chip and model data externally, so peak intermediate storage must fit. The optional max_scratch_size check limits the accelerator’s temporary workspace; it does not budget every other runtime allocation.

A bounded first exercise

The Ethos-U tutorial supplies a small addition example. After installing ExecuTorch and the Arm dependencies, quantize and export it, build the runner, then execute it on virtual Corstone hardware. With inputs of ones, the documented expected output is close to two. CurioFuse suggests using this as an initial workflow check before a larger model; we have not run it or measured hardware performance.